MITSUBISHI ICs (COMMUNICATION)
M64811AGP
1.1GHz/500MHz DUAL PLL FREQUENCY SYNTHESIZER FOR DIGITAL CELLULAR PHONE DESCRI...
MITSUBISHI ICs (COMMUNICATION)
M64811AGP
1.1GHz/500MHz DUAL PLL FREQUENCY SYNTHESIZER FOR DIGITAL CELLULAR PHONE DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M64811AGP is a 1.1GHz/500MHz band two-system one-chip PLL frequency synthesizer . Using a high performance Bi-
CMOS process , the product contains one two-modulus (1/32 and 1/33) prescaler that accepts inputs up to 1.1GHz and another two-modulus (1/16 and 1/17) prescaler that accepts inputs up to 500MHz ,thus helping make the equipment compact . FEATURES
FIN1 GND CPS SI LE SLEEP1 SLEEP2
1 2 3 4 5 6 7
16 15 14 13 12 11 10
PD1 Vcc XIN XOUT XBo LOCK GND
Operating supply
voltage : 2.7V~3.6V FIN2 PD2 8 9 Operating temperature : -30°C~+85°C 2 PLL systems (1.1GHz and 500MHz) are on one chip . PLL1 : 700MHz~1.1GHz PLL2 : 100MHz~500MHz Low power consumption (Icc=8mA Typ at Vcc=3V) . Dividing ratio setting ranges : FIN1 for 1.1GHz VCO N(VCO1)=1,024~131,071 FIN2 for 500MHz VCO N(VCO2)=256~131,071 OSC for Fref N(Fref)=5~2,047 Each loop has input pin for sleep mode . Power supplies to 2 loops can be independently turned ON/OFF . Also can be controlled by the serial data . (When SLEEP1 and SLEEP2 is "H" . ) The PLL standard oscillation circuit can adopt a B-E Colpitts type oscillation circuit to from a stable oscillation circuit. Current controlled charge pump . (Icp=±2mA const.) Locked condition detecting output If a phase difference smaller than 3 times (∆t) of the O...