2001.May Rev.0.1
MITSUBISHI LSIs
Advanced Information
Notice: This is not final specification. Some parametric limits are subject to change.
M5M5Y5672TG – 25,22,20
18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM Synchronous circuitry allows for precise cycle control triggered by a positive edge clock transition. Synchronous signals include : all Addresse...