MITSUBISHI LSls
M5M4257P-12, -15, -20
262 144·BIT (262 144·WORD BY I.BIT) DYNAMIC RAM
DESCRIPTION
This is a family of 2...
MITSUBISHI LSls
M5M4257P-12, -15, -20
262 144·BIT (262 144·WORD BY I.BIT) DYNAMIC RAM
DESCRIPTION
This is a family of 262 144-word by 1-bit dynamic RAMs, fabricated with the high performance N-channel silicon gate MOS process, and is ideal for large-capacity memory systems where high speed, low power dissipation, and low costs are essential. The use of double-layer polysi licon process combined with silicide technology and a singletransistor dynamic storage cell provide high circuit density at reduced costs, and the use of dynamic circuitry including sense
amplifiers assures low power dissipation. Multiplexed address inputs permit both a reduction in pins to the standard 16-pin package configuration and an increase in system densities. In addition to the RAS only refresh mode, the Hidden refresh mode and CAS before RAS refresh mode are available.
FEATURES
Type name
Access time (max) (ns)
Cycle time (min) (ns)
Power dissipation (typ) (mW)
M5M4257P-12
120
230
260
M5M4257P -1...