M54HCT27 M74HCT27
TRIPLE 3-INPUT NOR GATE
. . . . . . .
HIGH SPEED tPD = 9 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATIO...
M54HCT27 M74HCT27
TRIPLE 3-INPUT NOR GATE
. . . . . . .
HIGH SPEED tPD = 9 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL PIN AND FUNCTION COMPATIBLE WITH 54/74LS27
B1R (Plastic Package)
F1R (Ceramic Package)
M1R (Micro Package)
C1R (Chip Carrier)
DESCRIPTION The M54/74HCT27 is a high speed
CMOS TRIPLE 3-INPUT NOR GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true
CMOS low power consumption. The internal circuit is composed of 3 stages including buffered output, which gives high noise immunity and a stable output. All inputs are equipped with protection circuits against static discharge and transient excess
voltage. This integrated circuit has input and output characteristics that are fully compatible with 54/74 LSTTL logic families. M54/74HCT devices are designed to directly interface HSC2MOS systems with TTL and NMOS components. They are also plug in replacements for LSTTL devices giving a reduction of power consumption. INPUT AND OUTPUT EQUIVALENT CIRCUIT
ORDER CODES : M54HCT27F1R M74HCT27M1R M74HCT27B1R M74HCT27C1R
PIN CONNECTIONS (top view)
NC = No Internal Connection
February 1993
1/9
M54/M74HCT27
TRUTH TABLE
A L H X X B L X H X C L X X H Y H L L L
IEC Logic Symbol
PIN ...