M48T59

M48T59 M48T59Y/M48T59V 64 Kbit (8Kb x8) TIMEKEEPER® SRAM PRELIMINARY DATA s INTEGRATED ULTRA LOW POWER SRAM, REAL TIME CLOCK, POWER-FAIL CONTROL CIRCUIT and BATTERY FREQUENCY TEST OUTPUT for REAL TIME CLOCK SOFTWARE CALIBRATION AUTOMATIC POWER-FAIL CHIP DESELECT and WRITE PROTECTION WRITE PROTECT VOLTAGES (VPFD = Power-fail Deselect Voltage): – M48T59: 4.5V ≤ VPFD ≤ 4.75V – M48T59Y: 4.2V ≤ VPFD ≤ 4.5V – M48T59V: 2.7V ≤ VPFD ≤ 3.0V SNAPHAT (SH) Battery/Crytstal s s s 28 28 1 1 SOH28 (MH) PCDIP28 (PC) Battery/Crystal CAPHAT s SELF-CONTAINED BATTERY and CRYSTAL in the CAPHAT DIP PACKAGE PACKAGING INCLUDES a 28-LEAD SOIC and SNAPHAT® TOP (to be Ordered Separately) SOIC PACKAGE PROVIDES DIRECT CONNECTION for a SNAPHAT TOP which CONTAINS the BATTERY and CRYSTAL MICROPROCESSOR POWER-ON RESET (Valid even during battery back-up mode) PROGRAMMABLE ALARM OUTPUT ACTIVE in the BATTERY BACK-UP MODE BATTERY LOW FLAG A0-A12 M48T59 M48T59Y M48T59V 13 VCC s Figure 1. Logic Diagram s s s 8 DQ0-DQ7 s Table 1. Signal Names A0-A12 DQ0-DQ7 IRQ/FT RST E G W VCC VSS October 1999 Address Inputs Data Inputs / Outputs Interrupt / Frequency Test Output (Open Drain) Power Fail Reset Output (Open Drain) Chip Enable Output Enable Write Enable Supply Voltage Ground W E G IRQ/FT RST VSS AI01380E 1/21 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. M48T59, M48T59Y, M48T59V Figure 2A. DIP Connec...