• Power supply : Vdd: 2.5V ± 0.2V, Vddq: 2.5V ± 0.2V
• Double-data-rate architecture; two data transfers per clock cycle
• Bidirectional data strobe(DQS) • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition • ...
M368L6423FTN PDF File
