M30LW128D

M30LW128D 128 Mbit (two 64Mbit, x8/x16, Uniform Block, Flash Memories) 3V Supply, Multiple Memory Product PRELIMINARY DATA FEATURES SUMMARY s TWO M58LW064D 64Mbit FLASH MEMORIES STACKED IN A SINGLE PACKAGE s Figure 1. Packages WIDE x8 or x16 DATA BUS for HIGH BANDWIDTH SUPPLY VOLTAGE – VDD = 2.7 to 3.6V for Program, Erase and Read operations s s – VDDQ = 1.8 to VDD for I/O buffers ACCESS TIME – Random Read 110ns – Page Mode Read 110/25ns TSOP56 (N) 14 x 20 mm s PROGRAMMING TIME – 16 Word Write Buffer – 16µs Word effective programming time TBGA s 128 UNIFORM 64 KWord/128KByte MEMORY BLOCKS BLOCK PROTECTION/ UNPROTECTION PROGRAM and ERASE SUSPEND 128 bit PROTECTION REGISTER COMMON FLASH INTERFACE 100, 000 PROGRAM/ERASE CYCLES per BLOCK ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Device Code M30LW128D: 8817h TBGA64 (ZA) 10 x 13mm s s s s s FBGA s LFBGA88 (ZE) 8 x 10mm February 2003 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/57 M30LW128D TABLE OF CONTENTS SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ....