Part Number
|
M2S28D20ATP |
Manufacturer
|
Mitsubishi |
Description
|
128M Double Data Rate Synchronous DRAM |
Published
|
May 2, 2005 |
Datasheet
|
M2S28D20ATP PDF File
|
Features
- Vdd=Vddq=2.5V+0.2V - Double data rate architecture; two data transfers per clock cycle - Bidirectional, data strobe (DQS) is transmitted/received with data - Differential clock inputs (CLK and /CLK) - DLL aligns DQ and DQS transitions with CLK tran...
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