®
LY621024
Rev. 1.5
128K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
Revision Rev. 1.0 Rev. 1.1 Rev. 1.2 Rev. 1.3 Re...
®
LY621024
Rev. 1.5
128K X 8 BIT LOW POWER
CMOS SRAM
REVISION HISTORY
Revision Rev. 1.0 Rev. 1.1 Rev. 1.2 Rev. 1.3 Rev. 1.4 Description Issue Date Initial Issue Jul.25.2004 Revised sym. b of 32 pin 450mil SOP package outline dimension Jan.17.2007 in page 8 Added SL(C-grade) Spec. Jun.14.2007 Revised ISB/IDR(MAX.) Aug.20.2008 Added SL(E/I-grade) Spec. Deleted L Spec. Revised ISB1/IDR(MAX.) Mar.30.2009 ℃ ℃ Added ISB1/IDR values when TA = 25 and TA = 40 Revised FEATURES & ORDERING INFORMATION Lead free and green package available to Green package available Added packing type in ORDERING INFORMATION Deleted TSOLDER in ABSOLUTE MAXIMUN RATINGS Sep.11.2009 Revised VDR
Rev. 1.5
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Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 0
®
LY621024
Rev. 1.5
128K X 8 BIT LOW POWER
CMOS SRAM
GENERAL DESCRIPTION
The LY621024 is a 1,048,576-bit low power
CMOS static random access memory organized as 131,072 words by 8 bits. It is fabricated using very high performance, high reliability
CMOS technology. Its standby current is stable within the range of operating temperature. The LY621024 is well designed for very low power system applications, and particularly well suited for battery back-up nonvolatile memory application. The LY621024 operates from a single power supply of 5V and all inputs and outputs are f...
