®
LY612568
Preliminary 0.2
5V 256K X 8 BIT HIGH SPEED CMOS SRAM
REVISION HISTORY
Revision Rev. 0.1 Rev. 0.2 Description Preliminary Revised Test Condition of ISB1/IDR Revised VTERM to VT1 and VT2 Revised FEATURES & ORDERING INFORMATION Lead free and green package available to Green package available Added packing type in ORDERING INFORMATION Deleted TSOLD...
