KM4132G512A
CMOS SGRAM
16Mbit SGRAM
www.DataSheet4U.com
256K x 32bit x 2 Banks Synchronous Graphic RAM LVTTL
Revisio...
KM4132G512A
CMOS SGRAM
16Mbit SGRAM
www.DataSheet4U.com
256K x 32bit x 2 Banks Synchronous Graphic RAM LVTTL
Revision 1.2 July 1999
Samsung Electronics reserves the right to change products or specification without notice.
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Rev. 1.2 (Jul. 1999)
KM4132G512A
Revision History
Revision 1.2 (July 14th, 1999)
Remove -10 part.
CMOS SGRAM
Revision 1.1 (June 23th, 1999)
Add -10 part.
Revision 1.0 (June 10th, 1999) - Final Spec
AC values of tRCD/tRP/tRAS/tRC are returned to the number of clock cycles. Those can be also converted to ns unit based values by multiplying the number of clock cycles and clock cycle time of each part together. Accordingly, - Changed tRCD and tRP of KM4132G512A-5/7/8 each from 18ns to 20ns/21ns/20ns - Changed tRC of KM4132G512A-7/8 each from 67ns/68ns to 70ns www.DataSheet4U.com - Changed tRC of KM4132G512A-5 from 65ns(13CLK) to 60ns (12CLK) - Changed tRC of KM4132G512A-6 from 66ns(11CLK) to 60ns (10CLK) Add KM4132G512A-C(183MHz@CL3) part .For -C part, tRDL=1CLK can be supported within restricted amounts and it will be distingusihed by bucket code "NV"
Revision 0.1 (April 1999) - Preliminary Spec
Changed ILI and ILO from +/- 5uA to +/-10uA. Changed tSAC and tSHZ of KM4132G512A-8@CL2 from 7ns to 6ns.
Revision 0.0 (March 1999)
First edition
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Rev. 1.2 (Jul. 1999)
CMOS SGRAM
256K x 32Bit x 2 Banks Synchronous Graphic RAM
FEATURES
3.3V power supply LVTTL compatible with multiplexed address Dual banks operation MRS cycle with addr...