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KK4001B

KODENSHI KOREA

Quad 2-Input NOR Gate High-Voltage Silicon-Gate CMOS

www.DataSheet4U.com TECHNICAL DATA KK4001B Quad 2-Input NOR Gate High-Voltage Silicon-Gate CMOS The KK4001B NOR gates...



KK4001B

KODENSHI KOREA


Octopart Stock #: O-650502

Findchips Stock #: 650502-F

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www.DataSheet4U.com TECHNICAL DATA KK4001B Quad 2-Input NOR Gate High-Voltage Silicon-Gate CMOS The KK4001B NOR gates provide the system designer with direct emplementation of the NOR function. Operating Voltage Range: 3.0 to 18 V Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C Noise margin (over full package temperature range): 0.5 V min @ 5.0 V supply 1.0 V min @ 10.0 V supply 1.5 V min @ 15.0 V supply ORDERING INFORMATION KK4001BN Plastic KK4001BD SOIC TA = -55° to 125° C for all packages LOGIC DIAGRAM PIN ASSIGNMENT FUNCTION TABLE PIN 14 =VCC PIN 7 = GND A L L H H Inputs B L H L H Output Y H L L L L – LOW voltage level H – HIGH voltage level 1 www.DataSheet4U.com KK4001B MAXIMUM RATINGS* Symbol VCC VIN IIN PD Ptot Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +20 -0.5 to VCC +0.5 ±10 500 500 100 -65 to +150 260 Unit V V mA mW mW °C °C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 12 mW/°C from 100° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIO...




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