K9F4008W0A-TCB0

K9F3208W0A-TCB0, K9F3208W0A-TIB0 Document Title 4M x 8 Bit NAND Flash Memory FLASH MEMORY Revision History Revision No. History 0.0 0.1 Initial issue. Data Sheet, 1999 1. Added CE don’t care mode during the data-loading and reading 0.2 1. Revised real-time map-out algorithm(refer to technical notes) 2. Removed erase suspend/resume mode 1. Changed device name - KM29W32000AT -> K9F3208W0A-TCB0 - KM29W32000AIT -> K9F3208W0A-TIB0 1. Changed invalid block(s) marking method prior to shipping - The invalid block(s) information is written the 1st or 2nd page of the invalid block(s) with 00h data --->The invalid block(s) status is defined by the 6th byte in the spare area. Samsung makes sure that either the 1st or 2nd page of every invalid block has non-FFh data at the column address of 517. 2. Changed SE pin description - SE is recommended to coupled to GND or Vcc and should not be toggled during reading or programming. 1.Powerup sequence is added : Recovery time of minimum 1µs is required before internal circuit gets ready for any command sequences ~ 2.5V Draft Date April 10th 1998 April 10th 1999 Remark Advance July 23th 1999 0.3 Sep. 15th 1999 0.4 July 17th 2000 0.5 July 23th 2001 ≈ ~ 2.5V VCC High WP WE 2. AC parameter tCLR(CLE to RE Delay, min 50ns) is added. 3. AC parameter tAR1 value : 150ns --> 20ns 4. #40 Pin Name : nSE --> GND Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site. http://www.intl.samsu...