K9F1G08D0M

www.DataSheet4U.com K9F1G08Q0M K9F1G16Q0M K9F1G08D0M K9F1G16D0M K9F1G08U0M K9F1G16U0M FLASH MEMORY Document Title 128M x 8 Bit / 64M x 16 Bit NAND Flash Memory Revision History Revision No 0.0 0.1 History 1. Initial issue 1. Iol(R/B) of 1.8V is changed. - min. value : 7mA --> 3mA - Typ. value : 8mA --> 4mA 2. AC parameter is changed. tRP(min.) : 30ns --> 25ns 3. A recovery time of minimum 1µs is required before internal circuit gets ready for any command sequences as shown in Figure 17. ---> A recovery time of minimum 10µs is required before internal circuit gets ready for any command sequences as shown in Figure 17. Draft Date July. 5. 2001 Nov. 5. 2001 Remark Advance Dec. 4. 2001 0.2 1. ALE status fault in ’ Random data out in a page’ timing diagram(page 19) is fixed. 1. tAR1, tAR2 are merged to tAR.(Page11) (Before revision) min. tAR1 = 10ns , min. tAR2 = 50ns (After revision) min. tAR = 10ns 2. min. tCLR is changed from 50ns to 10ns.(Page11) 3. min. tREA is changed from 35ns to 30ns.(Page11) 4. min. tWC is changed from 50ns to 45ns.(Page11) 5. tRHZ is devided into tRHZ and tOH.(Page11) - tRHZ : RE High to Output Hi-Z - tOH : RE High to Output Hold 6. tCHZ is devided into tCHZ and tOH.(Page11) - tCHZ : CE High to Output Hi-Z - tOH : CE High to Output Hold 1. Add the Rp vs tr ,tf & Rp vs ibusy graph for 1.8V device (Page 35) 2. Add the data protection Vcc guidence for 1.8V device - below about 1.1V. (Page 36) 1. The min. Vcc value 1.8V devices is changed. K9F1GXXQ...