K3N5V(U)1000F-D(G)C
16M-Bit (2Mx8 /1Mx16) CMOS MASK ROM
FEATURES
• Switchable organization 2,097,152 x 8(byte mode) 1,04...
K3N5V(U)1000F-D(G)C
16M-Bit (2Mx8 /1Mx16)
CMOS MASK ROM
FEATURES
Switchable organization 2,097,152 x 8(byte mode) 1,048,576 x 16(word mode) Fast access time 3.3V Operation : 100ns(Max.)@CL=50pF, 120ns(Max.)@CL=100pF 3.0V Operation : 120ns(Max.)@CL=100pF Supply
voltage : single +3.0V/single +3.3V www.DataSheet4U.com Current consumption Operating : 40mA(Max.) Standby : 30µA(Max.) Fully static operation All inputs and outputs TTL compatible Three state outputs Package -. K3N5V(U)1000F-DC : 42-DIP-600 -. K3N5V(U)1000F-GC : 44-SOP-600
CMOS MASK ROM
GENERAL DESCRIPTION
The K3N5V(U)1000F-D(G)C is a fully static mask programmable ROM fabricated using silicon gate
CMOS process technology, and is organized either as 2,097,152 x 8 bit(byte mode) or as 1,048,576x16 bit(word mode) depending on BHE
voltage level.(See mode selection table) This device operates with 3.0V or 3.3V power supply, and all inputs and outputs are TTL compatible. Because of its asynchronous operation, it requires no external clock assuring extremely easy operation. It is suitable for use in program memory of microprocessor, and data memory, character generator. The K3N5V(U)1000F-DC is packaged in a 42-DIP and the K3N5V(U)1000F-GC in a 44-SOP.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
A19 . . . . . . . . A0 A-1
X BUFFERS AND DECODER
MEMORY CELL MATRIX (1,048,576x16/ 2,097,152x8)
A18 A17 A7 A6 A5 A4 A3
1 2 3 4 5 6 7 8 9
42 A19 41 A8 40 A9 39 A10 38 A11 37 A12 36 A13 35 A14 34 A15 33 A16 32 B...