ispLSI® 3256A
In-System Programmable High Density PLD
OutputDISCALOLNTDIENVUIECRoutingPoolDE
Features
• HIGH-DENSITY P...
ispLSI® 3256A
In-System Programmable High Density PLD
OutputDISCALOLNTDIENVUIECRoutingPoolDE
Features
HIGH-DENSITY PROGRAMMABLE LOGIC — 128 I/O Pins — 11000 PLD Gates — 384 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small Logic Block Size for Random Logic
HIGH-PERFORMANCE E2
CMOS® TECHNOLOGY
— fmax = 90 MHz Maximum Operating Frequency — tpd = 12 ns Propagation Delay
— TTL Compatible Inputs and Outputs — Electrically Erasable and Reprogrammable — Non-Volatile — 100% Tested at Time of Manufacture — Unused Product Term Shutdown Saves Power
IN-SYSTEM PROGRAMMABLE — 5V In-System Programmable (ISP™) using Lattice ISP or Boundary Scan Test (IEEE 1149.1) Protocol — Increased Manufacturing Yields, Reduced Time-toMarket, and Improved Product Quality — Reprogram Soldered Devices for Faster Debugging
100% IEEE 1149.1 BOUNDARY SCAN COMPATIBLE
OFFERS THE EASE OF US...