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IN74LV138 Datasheet

Part Number IN74LV138
Manufacturers IK Semiconductor
Logo IK Semiconductor
Description 3-8 Decoder/Demultiplexer
Datasheet IN74LV138 DatasheetIN74LV138 Datasheet (PDF)

TECHNICAL DATA IN74LV138 3-to-8 line decoder/demultiplexer; inverting N SUFFIX PLASTIC The IN74LV138 is a low-voltage Si-gate CMOS device and is pin and function compatible 74HCT138. The74LV138 accepts three binary weighted address inputs (A0,A1,A2) and when enabled, provide 8 - mutually exclusive active LOW outputs (Y0 to Y7). The “138” features three enable inputs: two active LOW (CS2,CS3 and one active HIGH (CS1).Every output will be HIGH unless CS2, and CS3 are LOW and CS1 is HIGH. • • • •.

  IN74LV138   IN74LV138






Part Number IN74LV139
Manufacturers IK Semiconductor
Logo IK Semiconductor
Description Dual 2-4 Decoder/Demultiplexer
Datasheet IN74LV138 DatasheetIN74LV139 Datasheet (PDF)

TECHNICAL DATA Dual 2-to-4 line decoder/demultiplexer; inverting The IN74LV139 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HCT139. The74LV139 is dual 2-to-4 line decoder/demultiplexer . This device has two independent decoders, each accepting two binary weighted inputs (A0a,A0b and A1a,A1b) and providing four mutually exclusive active LOW outputs (nY0 to nY3). Each decoder has an active LOW enable input (nE) When nE is HIGH, every output is forced HIGH. The en.

  IN74LV138   IN74LV138







3-8 Decoder/Demultiplexer

TECHNICAL DATA IN74LV138 3-to-8 line decoder/demultiplexer; inverting N SUFFIX PLASTIC The IN74LV138 is a low-voltage Si-gate CMOS device and is pin and function compatible 74HCT138. The74LV138 accepts three binary weighted address inputs (A0,A1,A2) and when enabled, provide 8 - mutually exclusive active LOW outputs (Y0 to Y7). The “138” features three enable inputs: two active LOW (CS2,CS3 and one active HIGH (CS1).Every output will be HIGH unless CS2, and CS3 are LOW and CS1 is HIGH. • • • • • • Optimized for Low Voltage applications:1.2 to 3.6 V Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Active LOW mutually exclusive outputs Output capability: standard 16 1 16 1 D SUFFIX SOIC ORDERING INFORMATION IN74LV138N Plastic IN74LV138D SOIC TA = -40° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs CS1 CS2 CS3 X X H X H X L X X H H H H H H H H L L L L L L L L L L L L L L L L A2 A1 A0 X X X X X X X X X L L L L H H H H L L H H L L H H L H L H L H L H Outputs Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 H H H H H H H H H H H H H H H H H H H H H H H H L H H H H H H H H L H H H H H H H H L H H H H H H H H L H H H H H H H H L H H H H H H H H L H H H H H H H H L H H H H H H H H L PIN 16 =VCC PIN 8 = GND w w w . t a d e h as . u 4 t e m o c H = high level (steady state) L = low level (steady state) X = don’t care 1 www.DataSheet4U.com IN74LV138 MAXIMUM RATINGS Symbol VCC IIK IOK IO ICC Tstg PD * Par.


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