IMISM561

SM561 Spread Spectrum Clock Generator Features 54- to 166-MHz operating frequency range Wide (9) range of spread selections Accepts clock and crystal inputs Low power dissipation 3.3V = 165 mw. (Fin = 120 MHz) Frequency spread disable function Center spread modulation Low cycle-to-cycle jitter Eight-pin SOIC package Applications High-resolution VGA controllers LCD panels and monitors Workstations and servers Benefits Peak electromagnetic interference (EMI) reduction by 8 to 16 dB Fast time to market Cost reduction Block Diagram Pin Configuration 250 K Xin/CLK Xin/ CLK 1 4 pf REFERENCE DIVIDER PD CP LF 1 2 3 4 8 7 6 5 Xout S0 S1 SSCC VDD VSS MODULATION CONTROL SSCLK FEEDBACK DIVIDER VCO Xout 8 8 pF VDD VSS 2 INPUT DECODER LOGIC DIVIDER AND MUX 3 4 SSCLK 5 6 7 SSCC S1 S0 Cypress Semiconductor Corporation Document #: 38-07021 Rev. *C 3901 North First Street San Jose, CA 95134 408-943-2600 Revised December 14, 2002 SM561 . Pin Description Pin Number 1 2 3 4 5 Pin Name Xin/CLK VDD GND SSCLK SSCC Pin Type I P P O I Pin Description Clock or Crystal connection input. Refer to Table 1 for input frequency range selection. Positive power supply. Power supply ground. Modulated clock output. Spread Spectrum Clock Control (Enable/Disable) function. SSCG function is enabled when input is high and disabled when input is low. This pin is pulled high internally. Tri-level Logic input control pin used to select Frequency and B...