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IDT77305 Datasheet

Part Number IDT77305
Manufacturers Integrated Device
Logo Integrated Device
Description UTOPIAFIFO 4 PORT MULTIPLEXER FIFO
Datasheet IDT77305 DatasheetIDT77305 Datasheet (PDF)

UTOPIA.I.O™ 4-PORT (128 X 9 X 4) MULTIPLEXER-.I.O .eatures x x x x 1,6%%!# x x x x Four Independent Input 128 x9 FIFO Queues Nine bit wide input FIFOs Single selectable 9 or 18 bit output bus "UtopiaRx" or "UtopiaTx" Utopia compliant interface signaling options Separate clocks for input and output Selectable Automatic byte insertion for 8-bit Receive Utopia to 16bit Receive Utopia compliance Four 155Mbs ATM input channels can be consolidated into a single 622Mbs channel with no additional .

  IDT77305   IDT77305






UTOPIAFIFO 4 PORT MULTIPLEXER FIFO

UTOPIA.I.O™ 4-PORT (128 X 9 X 4) MULTIPLEXER-.I.O .eatures x x x x 1,6%%!# x x x x Four Independent Input 128 x9 FIFO Queues Nine bit wide input FIFOs Single selectable 9 or 18 bit output bus "UtopiaRx" or "UtopiaTx" Utopia compliant interface signaling options Separate clocks for input and output Selectable Automatic byte insertion for 8-bit Receive Utopia to 16bit Receive Utopia compliance Four 155Mbs ATM input channels can be consolidated into a single 622Mbs channel with no additional glue logic Maximum through put per device over 1.4Gbps x x x x x x x In a building block configuration multiple input channels can be multiplexed onto a 32, 64 or 128 bit bus. User programmable: – byte insert/delete, UtopiaTx/UtopiaRx mode, master/slave configuration, byte swapping Selectable Round Robin Sequencer output control Data clock rates to 80 MHz; access times 8.5 ns 100-pin TQPF package Separate cell ready signals for each FIFO and cell ready composite signal End of cell transfer flag .unctional Block Diagram CRn CRC ECT CSS RTS BDI CELL SIZE/CELL READY OE RST WCLK ROUND ROBIN SEQUENCER MSE RRE RCLK MUX1 MUX2 LDM X 18 SWP FIFO CONTROLLER 128 BYTES FIFO ENR a CLAVR a SOCR a Data a (0 - 8) ENR b CLAVR b SOCR b Data b (0 - 8) ENR c CLAVR c SOCR c Data c (0 - 8) ENR d CLAVR d SOCR d Data d (0 - 8) FIFO CONTROLLER 128 BYTES FIFO XOE ENS CLAVS SOCS , FIFO CONTROLLER 128 BYTES FIFO Q0 - Q8 Q9 - Q17 FIFO CONTROLLER 128 BYTES FIFO BSS 3206 drw 01 MARCH 2001 1 ©2001.


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