DatasheetsPDF.com

IDT72V253 Datasheet

Part Number IDT72V253
Manufacturers Integrated Device Tech
Logo Integrated Device Tech
Description 3.3 VOLT HIGH-DENSITY SUPERSYNC NARROW BUS FIFO
Datasheet IDT72V253 DatasheetIDT72V253 Datasheet (PDF)

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ NARROW BUS FIFO 512 x 18/1,024 x 9, 1,024 x 18/2,048 x 9 2,048 x 18/4,096 x 9, 4,096 x 18/8,192 x 9 8,192 x 18/16,384 x 9, 16,384 x 18/32,768 x 9 32,768 x 18/65,536 x 9, 65,536 x 18/131,072 x 9 IDT72V223, IDT72V233 IDT72V243, IDT72V253 IDT72V263, IDT72V273 IDT72V283, IDT72V293 FEATURES: • • • • • • • • Choose among the following memory organizations: IDT72V223  512 x 18/1,024 x 9 IDT72V233  1,024 x 18/2,048 x 9 IDT72V243  2,048 x 18/4,096 x 9 IDT72V253.

  IDT72V253   IDT72V253






Part Number IDT72V255LA
Manufacturers Integrated Device Tech
Logo Integrated Device Tech
Description CMOS FIFO memories
Datasheet IDT72V253 DatasheetIDT72V255LA Datasheet (PDF)

3.3 VOLT CMOS SuperSync FIFO™ 8,192 x 18 16,384 x 18 FEATURES: • • • • • • • IDT72V255LA IDT72V265LA • • • • • • • • • • • • • Choose among the following memory organizations: IDT72V255LA 8,192 x 18 IDT72V265LA 16,384 x 18 Pin-compatible with the IDT72V275/72V285 and IDT72V295/ 72V2105 SuperSync FIFOs Functionally compatible with the 5 Volt IDT72255/72265 family 10ns read/write cycle time (6.5ns access time) Fixed, low first word data latency time 5V input tolerant Auto power down minimizes s.

  IDT72V253   IDT72V253







Part Number IDT72V251
Manufacturers Renesas
Logo Renesas
Description 3.3 VOLT CMOS SyncFIFO
Datasheet IDT72V253 DatasheetIDT72V251 Datasheet (PDF)

3.3 VOLT CMOS SyncFIFO™ 256 x 9, 512 x 9, IDT72V201, IDT72V211 1,024 x 9, 2,048 x 9, IDT72V221, IDT72V231 4,096 x 9 and 8,192 x 9 IDT72V241, IDT72V251 LEAD FINISH (SnPb) ARE IN EOL PROCESS - LAST TIME BUY EXPIRES JUNE 15, 2018 FEATURES: • 256 x 9-bit organization IDT72V201 • 512 x 9-bit organization IDT72V211 • 1,024 x 9-bit organization IDT72V221 • 2,048 x 9-bit organization IDT72V231 • 4,096 x 9-bit organization IDT72V241 • 8,192 x 9-bit organization IDT72V251 • 10 ns read/write cycle .

  IDT72V253   IDT72V253







Part Number IDT72V251
Manufacturers Integrated Device Tech
Logo Integrated Device Tech
Description FIFO memories
Datasheet IDT72V253 DatasheetIDT72V251 Datasheet (PDF)

3.3 VOLT CMOS SyncFIFO™ 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9 IDT72V201, IDT72V211 IDT72V221, IDT72V231 IDT72V241, IDT72V251 FEATURES: • • • • • • • • • • • • • • • • • 256 x 9-bit organization IDT72V201 512 x 9-bit organization IDT72V211 1,024 x 9-bit organization IDT72V221 2,048 x 9-bit organization IDT72V231 4,096 x 9-bit organization IDT72V241 8,192 x 9-bit organization IDT72V251 10 ns read/write cycle time 5V input tolerant Read and Write clocks can be independe.

  IDT72V253   IDT72V253







3.3 VOLT HIGH-DENSITY SUPERSYNC NARROW BUS FIFO

3.3 VOLT HIGH-DENSITY SUPERSYNC II™ NARROW BUS FIFO 512 x 18/1,024 x 9, 1,024 x 18/2,048 x 9 2,048 x 18/4,096 x 9, 4,096 x 18/8,192 x 9 8,192 x 18/16,384 x 9, 16,384 x 18/32,768 x 9 32,768 x 18/65,536 x 9, 65,536 x 18/131,072 x 9 IDT72V223, IDT72V233 IDT72V243, IDT72V253 IDT72V263, IDT72V273 IDT72V283, IDT72V293 FEATURES: • • • • • • • • Choose among the following memory organizations: IDT72V223  512 x 18/1,024 x 9 IDT72V233  1,024 x 18/2,048 x 9 IDT72V243  2,048 x 18/4,096 x 9 IDT72V253  4,096 x 18/8,192 x 9 IDT72V263  8,192 x 18/16,384 x 9 IDT72V273  16,384 x 18/32,768 x 9 IDT72V283  32,768 x 18/65,536 x 9 IDT72V293  65,536 x 18/131,072 x 9 Functionally compatible with the IDT72V255LA/72V265LA and IDT72V275/72V285 SuperSync FIFOs Up to 166 MHz Operation of the Clocks User selectable Asynchronous read and/or write ports (BGA Only) User selectable input and output port bus-sizing - x9 in to x9 out - x9 in to x18 out - x18 in to x9 out - x18 in to x18 out Pin to Pin compatible to the higher density of IDT72V2103/72V2113 Big-Endian/Little-Endian user selectable byte representation 5V tolerant inputs • • • • • • • • • • • • • • • • • Fixed, low first word latency Zero latency retransmit Auto power down minimizes standby power consumption Master Reset clears entire FIFO Partial Reset clears data, but retains programmable settings Empty, Full and Half-Full flags signal FIFO status Programmable Almost-Empty and Almost-Full flags, each flag can default to one of eight.


2005-04-21 : FA4111    TA75558P    CS2917    IDT72V221    IDT72V223    IDT72V225    IDT72V231    IDT72V233    IDT72V235    IDT72V241   


@ 2014 :: Datasheetspdf.com ::
Semiconductors datasheet search & download site (Privacy Policy & Contact)