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IDQC0

CMOS Gate Array

Description

,'4& ® $0,+* PLFURQ &026 *DWH $UUD\ Description IDQC0 is a non-buffered, resistive crystal oscillator input receiver piece with ESD protection. Logic Symbol Truth Table Pin Loading IDQC0 QC P PADM D PADM QO LL HH PADM Load 4.90 pF HDL Syntax Verilog .................... IDQC0 inst_name (QO, PADM); VHDL...................... inst_name: IDQC0 ...

AMI

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