ICS9250-38

Integrated Circuit Systems, Inc. ICS9250-38 Frequency Generator with 200MHz Differential CPU Clocks Recommended Application: CK 408 clock for Almador-M mobile chipset with Tualatin Pin Configuration PIII processor. VDDREF 1 56 REF Output Features: X1 2 55 FS1 3 Differential CPU Clock Pairs @ 3.3V X2 3 54 FS0 GND 4 53 CPU_STOP#* 7 PCI (3.3V) @ 33.3MHz PCICLK_F0 5 52 CPUCLKT0 PCICLK_F1 6 51 CPUCLKC0 3 PCI_F (3.3V) @ 33.3MHz PCICLK_F2 7 50 VDDCPU VDDPCI 8 49 CPUCLKT1 1 USB (3.3V) @ 48MHz GND 9 48 CPUCLKC1 PCICLK0 10 47 GND 1 DOT (3.3V) @ 48MHz PCICLK1 11 46 VDDCPU PCICLK2 12 45 CPUCLKT2 1 REF (3.3V) @ 14.318MHz PCICLK3 13 44 CPUCLKC2 1 3V66 (3.3V) @ 66.6MHz VDDPCI 14 43 MULTSEL0* GND 15 42 I REF 1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz PCICLK4 16 41 GND PCICLK5 17 40 FS2 3 66MHz_OUT/3V66 (3.3V) @ 66.6MHz_IN PCICLK6 18 39 48MHz_USB VDD3V66 19 38 48MHz_DOT or 66.6MHz GND 20 37 VDD48 1 66MHz_IN/3V66 (3.3V) @ Input/66MHz 66MHz_OUT0/3V66_2 21 36 GND 66MHz_OUT1/3V66_3 22 35 3V66_1/VCH_CLK Features: 66MHz_OUT2/3V66_4 23 34 PCI_STOP#* 66MHz_IN/3V66_5 24 33 3V66_0 Almador Chipset has a DLL driving the clock buffer *PD# 25 32 VDD3V66 path for the 3 buffer path 66.6 MHz outputs, VDDA 26 31 GND GND 27 30 SCLK 66Buf(0:2). Vtt_PWRGD# 28 29 SDATA Almador board level designs MUST use pin 22, 66Buf_1, as the feedback connection from the clock buffer path to the Almador (GMCH) 56-Pin 300mil SSOP/TSSOP chipset. * These inputs have 150K internal pull-up resistor to VDD. Suppor...