ICS9250-28

Integrated Circuit Systems, Inc. ICS9250-28 Frequency Generator & Integrated Buffers for Celeron & PII/III™ Recommended Application: 810/810E and 815 type chipset. Output Features: 2 CPU (2.5V) (up to 133MHz achievable through I2C) 13 SDRAM (3.3V) (up to 133MHz achievable through I2C) 2 PCI (3.3 V) @33.3MHz 1 IOAPIC (2.5V) @ 33.3 MHz 3 Hublink clocks (3.3 V) @ 66.6 MHz 2 (3.3V) @ 48 MHz (Non spread spectrum) 1 REF (3.3V) @ 14.318 MHz Features: Supports spread spectrum modulation, 0 to -0.5% down spread. I2C support for power management Efficient power management scheme through PD# Uses external 14.138 MHz crystal Alternate frequency selections available through I2C control. Pin Configuration IOAPIC VDDL GND *FS1/REF0 VDDREF X1 X2 GND VDD3V66 3V66_0 3V66_1 3V66_2 GND VDDPCI PCICLK0 PCICLK1 GND FS0 GND VDDA PD# SCLK SDATA GND VDD48 48MHz_0 48MHz_1 FS2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 VDDL GND CPUCLK0 CPUCLK1 GND SDRAM0 SDRAM1 VDDSDR GND SDRAM2 SDRAM3 SDRAM4 VDDSDR GND SDRAM5 SDRAM6 VDDSDR GND SDRAM7 SDRAM8 SDRAM9 VDDSDR GND SDRAM10 SDRAM11 VDDSDR GND SDRAM12 56-Pin 300mil SSOP * This input has a 50KW pull-down to GND. Functionality Block Diagram FS2 0 0 REF0 PLL1 Spread Spectrum /2 /3 2 FS0 0 1 0 1 0 1 FS1 X X 0 0 1 1 ICS9250-28 Function Tristate Test Active CPU = 66MHz SDRAM = 100MHz Active CPU = 100MHz SDRAM = 100MHz Ac...