Integrated Circuit Systems, Inc.
ICS83948I-147
LOW SKEW, 1-TO-12 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
FEATURES
• ...
Integrated Circuit Systems, Inc.
ICS83948I-147
LOW SKEW, 1-TO-12 DIFFERENTIAL-TO-LV
CMOS/LVTTL FANOUT BUFFER
FEATURES
Twelve LV
CMOS/LVTTL outputs Selectable LV
CMOS/LVTTL clock or differential CLK, nCLK inputs CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL LV
CMOS_CLK accepts the following input levels: LV
CMOS or LVTTL Output frequency: 350MHz (maximum) Output skew (at 3.3V ± 5%): 100ps (maximum) Part-to-part skew (at 3.3V ± 5%): 1ns (maximum) Full 3.3V or full 2.5V operating supply -40°C to 85°C ambient operating temperature Available in both standard and lead-free RoHS-compliant packages
GENERAL DESCRIPTION
The ICS83948I-147 is a low skew, 1-to-12 Differential-to-LV
CMOS/LVTTL Fanout Buffer and HiPerClockS™ a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS83948I-147 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The LV
CMOS_CLK can accept LV
CMOS or LVTTL input levels. The low impedance LV
CMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated www.DataSheet4U.com transmission lines. The effective fanout can be increased from 12 to 24 by utilizing the ability of the outputs to drive two series terminated lines.
IC S
The ICS83948I-147 is characterized at full 3.3V or full 2.5V operating supply modes. Guaranteed output and part-to-part skew characteristics make the ICS83948I-147 ideal for thos...