ICS83940DI

Low Skew, 1 to 18 LVPECL to LVCMOS/LVTTL Fanout Buffer PRODUCT DISCONTINUATION NOTICE - LAST TIME BUY EXPIRES MAY 6, 2017 (83940DKILF) ICS83940DI Datasheet General Description Features The ICS83940DI is a low skew, 1 to 18 LVPECL to LVCMOS/LVTTL fanout buffer. The ICS83940DI has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS/LVTTL outputs are designed to drive 50 series or parallel terminated transmission lines. The ICS83940DI is characterized at full 3.3V and 2.5V or mixed 3.3V core, 2.5V output operating supply modes. Guaranteed output and part-to-part skew characteristics make the ICS83940DI ideal for those clock distribution applications demanding well defined performance and repeatability. Block Diagram CLK_SEL Pulldown PCLK Pulldown nPCLK Pullup/Pulldown 0 18 Q0:Q17 Eighteen LVCMOS/LVTTL outputs Selectable LVCMOS_CLK or LVPECL clock inputs PCLK, nPCLK pair can accept the following differential input levels: LVPECL, CML, SSTL LVCMOS_CLK supports the following input types: LVCMOS or LVTTL Maximum output frequency: 250MHz Output skew: 150ps (maximum) Part-to-part skew: 750ps (maximum) Operating supply modes: Core/Output 3.3V/3.3V 3.3V/2.5V 2.5V/2.5V -40°C to 85°C ambient operating temperature Lead-free (RoHS 6) packaging For functional replacement part for 83940DKILF, use 87016i LVCMOS_CLK Pulldown 1 Pin Assi...