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ICS650G-44 Datasheet

Part Number ICS650G-44
Manufacturers Integrated Circuit Systems
Logo Integrated Circuit Systems
Description Spread Spectrum Clock Synthesizer
Datasheet ICS650G-44 DatasheetICS650G-44 Datasheet (PDF)

P R E L I M I N A R Y I N F O R M AT I O N ICS650-44 Spread Spectrum Clock Synthesizer Description The ICS650-44 is a spread spectrum clock synthesizer intended for video projector and digital TV applications. It generates three copies of an EMI optimized 50 MHz clock signal (EMI peak reduction of 7 to 14 dB on 3rd through 19th harmonics) through the use of Spread Spectrum techniques from a 25 MHz crystal or clock input. The modulation rate is 50 kHz. Features • • • • • • • • • Packaged in 16.

  ICS650G-44   ICS650G-44






Part Number ICS650G-40
Manufacturers Integrated Circuit Systems
Logo Integrated Circuit Systems
Description ETHERNET SWITCH CLOCK SOURCE
Datasheet ICS650G-44 DatasheetICS650G-40 Datasheet (PDF)

ICS650-40 ETHERNET SWITCH CLOCK SOURCE Description The ICS650-40 is a clock chip designed for use in Ethernet Switch applications. Using ICS’ patented Phase-Locked Loop (PLL) techniques, the device takes a 25 MHz crystal input and produces various output clock frequencies as listed in Output Select Table. Features • • • • • • • Packaged in 16-pin TSSOP Available in Pb (lead) free package Operating voltage of 3.3 V Low power consumption Input frequency of 25 MHz Low long-term jitter 2.5 V to 3.3.

  ICS650G-44   ICS650G-44







Spread Spectrum Clock Synthesizer

P R E L I M I N A R Y I N F O R M AT I O N ICS650-44 Spread Spectrum Clock Synthesizer Description The ICS650-44 is a spread spectrum clock synthesizer intended for video projector and digital TV applications. It generates three copies of an EMI optimized 50 MHz clock signal (EMI peak reduction of 7 to 14 dB on 3rd through 19th harmonics) through the use of Spread Spectrum techniques from a 25 MHz crystal or clock input. The modulation rate is 50 kHz. Features • • • • • • • • • Packaged in 16-pin TSSOP (173 mil) Supply voltages: VDD = 3.3 V, VDDO = 2.5 V Peak-to-peak jitter: ±125 ps typ Output duty cycle 45/55% (worst case) 25 MHz crystal or reference clock input Zero (0) ppm frequency error on all output clocks Advanced, low-power CMOS process Industrial temperature range (-40 to +85°C) Available in Pb (lead) free package Block Diagram VDD 3 25 MHz crystal or clock input X1/CLKIN Crystal OSC X2 External capacitors are required with a crystal input. VDDO 50M PLL with Spread Spectrum Control Logic 50M FS3:0 50M GND 2 PDTS MDS 650-44 C Integrated Circuit Systems, Inc. ● 1 525 Race Street, San Jose, CA 95126 ● Revision 080305 tel (408) 297-1201 ● www.icst.com P R E L I M I N A R Y I N F O R M AT I O N ICS650-44 Spread Spectrum Clock Synthesizer Pin Assignment X1/ CLKIN FS0 FS1 50M VDD GND FS3 50M 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 X2 VDD PDTS FS2 VDD GND VDDO 50M Spread Spectrum and Output Configuration Table FS3 FS2 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 .


2006-04-27 : MFOD72    LM300XM    LM300XN    MFOD75    LM3001    MFOD71    MFOD73    LM100    DD-00429    LM300   


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