ICS503

PRELIMINARY INFORMATION ICS503 LOCO™ PLL Clock Multiplier Features Packaged as 8 pin SOIC or die ICS’ lowest cost PLL clock family Generates 16.9344 MHz for stereo codecs from the 14.31818 MHz motherboard clock Can be cost effective in replacing a single surface-mount crystal Can be driven by other 5xx series Input crystal frequency of 5 - 27 MHz Input clock frequency of 2 - 50 MHz Output clock frequencies up to 160 MHz Low jitter - 50 ps one sigma Duty cycle of 45/55 up to 160 MHz Operating voltages of 3.0 to 5.5V Full CMOS level outputs with 25mA drive capability at TTL levels Advanced, low power CMOS process Description The ICS503 is a member of the LOCO™ family, the most cost effective way to generate a high quality, high frequency clock output from a low frequency crystal or clock input. The name LOCO stands for LOw Cost Oscillator, as it is designed to replace crystals and crystal oscillators in most electronic systems. Using Phase-Locked-Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 160 MHz. Stored in the chip’s ROM is the ability to generate 9 different multiplication factors, allowing one chip to be used in two or three different applications (see page 2). Block Diagram VDD GND S0 S1 Crystal or clock input X1/ICLK Crystal Oscillator X2 PLL Clock Multiplier Circuitry and ROM Output Buffer CLK Optional crystal capacitors MDS 503 A 1 Revision 111000 Integrated C...