4M × 72-Bit EDO-DRAM Module (ECC - Module) 168 pin buffered DIMM Module
HYM 72V4005GS-50/-60 HYM 72V4015GS-50/-60
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4M × 72-Bit EDO-DRAM Module (ECC - Module) 168 pin buffered DIMM Module
HYM 72V4005GS-50/-60 HYM 72V4015GS-50/-60
168 Pin JEDEC Standard, Buffered 8 Byte Dual In-Line Memory Module for PC main memory applications 1 bank 4M x 72 organisation Optimized for ECC applications Extended Data Out (EDO) Performance:
-50 tRAC tCAC tAA tRC tHPC RAS Access Time CAS Access Time Access Time from Address Cycle Time EDO Mode Cycle Time 50 ns 18 ns 30 ns 84 ns 20 ns -60 60 ns 20 ns 35 ns 104 ns 25 ns
Single + 3.3V ( ± 0.3V) supply CAS-before-RAS refresh, RAS-only-refresh Decoupling
capacitors mounted on substrate All inputs, outputs and clock fully LVTTL & LV
CMOS compatible 4 Byte interleave enabled, Dual Address inputs (A0/B0) Buffered inputs excepts RAS and DQ Parallel Presence detects Utilizes eighteen 4M × 4 -DRAMs and four Bi
CMOS buffers/line drivers Two versions : HYM 72V4005GS with TSOPII-components (4 mm thickness) HYM 72V4015GS with SOJ-components (9 mm thickness) 4096 refresh cycles / 64 ms with 12 / 10 addressing Gold contact pad Double sided module with 25.35 mm (1000 mil) height
Semiconductor Group
1
5.96
HYM72V4005/15GS-50/-60 4M x 72-ECC EDO-Module
The HYM 72V4005/15GS-50/-60 is a 32 MByte DRAM module organized as 4 194 430 words by 72bit in a 168-pin, dual read-out, single-in-line package comprising eighteen HYB 3116405BT/BJ 4M × 4 DRAMs in 300 mil wide TSOPII or SOJ- packages mounted together with ceramic decoupling
capacitors on ...