1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory
HY27UA(08/16)1G1M Series HY27SA(08/16)1G1M Series 1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Document Title 1Gbit (128Mx8b...
Description
HY27UA(08/16)1G1M Series HY27SA(08/16)1G1M Series 1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Document Title 1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory Revision History
No.
0.0 0.1 1) Initial Draft 1) Add 1.8V Operation Product to Data sheet 1) Change AC Characteristics - tWP(25ns->40ns), tWC(50ns->60ns), - tRP(30ns->40ns), tRC(50ns->60ns), - tREADID(35ns->45ns) 1) Add Errata (3V Product) tWH Specification Relaxed value 0.3 2) Add Applicaiton Note Reset command must be issued when the controller writes data to another 512Mb.(i.e. When A26 is changed during program.) 3) Modify the description of Device Operations - /CE Don’t Care Enabled(Disabled) -> Sequential Row Read Disabled (Enabled) (Page22) 4) Add the description of System Interface Using /CE don’t care (Page37) 1) Delete Errata 2) Change Characteristics 0.4 tCRY Before After 60 + tr 70 + tr tREA@ID Read 35 45 Jun. 01. 2004 Preliminary 15 20 tREH 15 20 May. 14. 2004 Preliminary Apr. 29. 2004 Preliminary
History
Draft Date
Nov. 28. 2003 Mar. 11. 2004
Remark
Preliminary Preliminary
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0.2
3) Delete Cache Program 0.5 1) Change TSOP1, WSOP1, FBGA package dimension 2) Edit TSOP1, WSOP1 package figures 3) Change FBGA package figure Oct. 20. 2004
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 0.5 / Oct. 2004 1
HY27UA(08/16)1G1M Series HY27SA(08/16)1G1M Se...
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