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HD74HC77

Hitachi Semiconductor

4-bit Bistable Latch

HD74HC77 4-bit Bistable Latch Description The HD74HC77 is ideally suited for use as temporary storage for binary inform...


Hitachi Semiconductor

HD74HC77

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Description
HD74HC77 4-bit Bistable Latch Description The HD74HC77 is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable (G) is high and the Q output will follow the data input as long as the enable remains high. When the enable goes low the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the enable is permitted to go high. Features High Speed Operation: tpd (D to Q) = 12 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C) Function Table Inputs D L H X G H H L Output Q L H No change HD74HC77 Pin Arrangement 1D 1 2D 2 Enable3-4 3 VCC 4 3D 5 4D 6 NC 7 D D Q G G Q Q D G D G Q 14 1Q 13 2Q 12 Enable1-2 11 GND 10 NC 9 3Q 8 4Q (Top view) Block Diagram (1//4) Data Q Enable 2 HD74HC77 DC Characteristics Ta = 25°C Item Input voltage Symbol VIH Ta = –40 to +85°C Max — — — 0.5 1.35 1.8 — — — — — 0.1 0.1 0.1 0.33 0.33 ±1.0 20 µA µA I OL = 4 mA I OL = 5.2 mA Vin = VCC or GND Vin = VCC or GND, Iout = 0 µA V I OH = –4 mA I OH = –5.2 mA Vin = VIH or VIL I OL = 20 µA V Vin = VIH or VIL I OH = –20 µA V Unit V Test Conditions VCC (V) Min Typ Max Min 2.0 4.5 6.0 1.5 — 3.15 — 4.2 — — — — — — — — — — 0.5 1.5 3....




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