HD74ALVCH16334

HD74ALVCH16334 16-bit Universal Bus Driver with 3-state Outputs ADE-205-212 (Z) Preliminary 1st. Edition December 1997 Description This HD74ALVCH16334 is a 16-bit universal bus driver is designed for 2.3 V to 3.6 V VCC operation. Data flow from A to Y is controlled by the output enable (O E) input. The device operates in the transparent mode when the latch enable (LE) input is low. When LE is high, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is high, the A data is stored in the latch/flip flop on the low to high transition of CLK. When OE is high, the outputs are in the high impedance state. To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the driver. Active bus hold circuitry is provided to hold unused or floating inputs at a valid logic level. Features VCC = 2.3 V to 3.6 V Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) High output current ±24 mA (@VCC = 3.0 V) Bus hold on data inputs eliminates the need for external pullup / pulldown resistors HD74ALVCH16334 Function Table Inputs OE H L L L L L LE X L L H H H CLK X X X ↑ ↑ L or H A X L H L H X Z L H L H Y0 *1 Output Y H : High level L : Low level X : Immaterial Z : High impedance ↑ : Low to high transition Note: 1. Output level before the indi...