HD74ALVC16835

HD74ALVC16835 18-bit Universal Bus Driver with 3-state Outputs REJ03D0053-0700 (Previous: ADE-205-192E) Rev.7.00 Apr 07, 2006 Description The HD74ALVC16835 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation. Data flow from A to Y is controlled by output enable (OE). The device operates in the transparent mode when the latch enable (LE) input is high. The A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is low, the A data is stored in the latch/flip flop on the low to high transition of the CLK. When OE is high, the outputs are in the high impedance state. To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup register; the minimum value of the register is determined by the current sinking capability of the driver. Features Meets “PC SDRAM registered DIMM design support document, Rev. 1.2” VCC = 2.3 V to 3.6 V Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V...