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FQD3P50TM_F085 Datasheet

Part Number FQD3P50TM_F085
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description 500V P-Channel MOSFET
Datasheet FQD3P50TM_F085 DatasheetFQD3P50TM_F085 Datasheet (PDF)

FQD3P50TM_F085 500V P-Channel MOSFET November 2010 FQD3P50TM_F085 500V P-Channel MOSFET General Description These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for electronic lamp ba.

  FQD3P50TM_F085   FQD3P50TM_F085






Part Number FQD3P50TM-F085
Manufacturers ON Semiconductor
Logo ON Semiconductor
Description 500V P-Channel MOSFET
Datasheet FQD3P50TM_F085 DatasheetFQD3P50TM-F085 Datasheet (PDF)

FQD3P50TM-F085 500V P-Channel MOSFET FQD3P50TM-F085 500V P-Channel MOSFET General Description These P-Channel enhancement mode power field effect transistors are produced using ON Semiconductor’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for electronic lamp ballast b.

  FQD3P50TM_F085   FQD3P50TM_F085







500V P-Channel MOSFET

FQD3P50TM_F085 500V P-Channel MOSFET November 2010 FQD3P50TM_F085 500V P-Channel MOSFET General Description These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for electronic lamp ballast based on complimentary half bridge. Features • -2.1A, -500V, RDS(on) = 4.9Ω @VGS = -10 V • Low gate charge ( typical 18 nC) • Low Crss ( typical 9.5 pF) • Fast switching • 100% avalanche tested • Improved dv/dt capability • Qualified to AEC Q101 • RoHS Compliant S D! GS D-PAK Absolute Maximum Ratings TC = 25°C unless otherwise noted Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL Parameter Drain-Source Voltage Drain Current - Continuous (TC = 25°C) - Continuous (TC = 100°C) Drain Current - Pulsed (Note 1) Gate-Source Voltage Single Pulsed Avalanche Energy (Note 2) Avalanche Current (Note 1) Repetitive Avalanche Energy (Note 1) Peak Diode Recovery dv/dt (Note 3) Power Dissipation (TA = 25°C) * Power Dissipation (TC = 25°C) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds G! ● ● ▶▲ ● ! D FQD3P50TM_F085 -500 -2.1 -1.33 -8.4 ± 30 250 -2.1 5.0 -4.5 2.5 50 0.4 -5.


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