FIN24A

Preliminary FIN24A PSerDes Low Voltage 24-Bit Bi-Directional Serializer/Deserializer with Multiple Frequency Ranges (Preliminary) April 2005 Revised May 2005 FIN24A PSerDes Low Voltage 24-Bit Bi-Directional Serializer/Deserializer with Multiple Frequency Ranges (Preliminary) General Description The FIN24A allows for a pair of SerDes to interleave data from two different data sources going opposite directions or standard bi-directional interface operation. The bi-directional data flow is controlled through use of a direction (DIRI) control pin. The devices can be configured to operate in a unidirectional mode only by hardwiring the DIRI pin. An internal PLL generates the required bit clock frequency for transfer across the serial link. The FIN24A supports multiple input frequency ranges which are selected by the S1 and S2 control pins. Options exist for dual or single PLL operation dependent upon system operational parameters. The device has been designed for low power operation and utilizes Fairchild Low Power LVDS interface. The device also supports an ultra low power Power-Down mode for conserving power in battery operated applications. Features s Low power consumption s Low power standards based LVDS differential interface s LVCMOS parallel I/O interface 2 mA source/sink current Over-voltage tolerant control signals s I/O Power Supply range between 1.65V and 3.6V s Analog Power Supply range of 2.775V r 5% s Multi-Mode operation allows for a single device to operate ...