F28M35H22C

F28M35H52C, F28M35H52C-Q1, F28M35H22C F28M35M52C, F28M35M22C, F28M35E20B SPRS742L – JUNE 2011 – REVISED FEBRUARY 2021 F28M35x Concerto™ Microcontrollers 1 Features Master Subsystem — Arm® Cortex®-M3 – Up to 100 MHz – Embedded memory Up to 512KB of flash (ECC) Up to 32KB of RAM (ECC or parity) Up to 64KB of shared RAM 2KB of IPC Message RAM – Five Universal Asynchronous Receiver/ Transmitters (UARTs) – Four Synchronous Serial Interfaces (SSIs) and a Serial Peripheral Interface (SPI) – Two Inter-integrated Circuits (I2Cs) – Universal Serial Bus On-the-Go (USB-OTG) + PHY – 10/100 ENET 1588 MII – Two Controller Area Network, D_CAN, modules (pin-bootable) – 32-channel Micro Direct Memory Access (µDMA) – Dual security zones (128-bit password per zone) – External Peripheral Interface (EPI) – Micro Cyclic Redundancy Check (µCRC) module – Four general-purpose timers – Two watchdog timer modules – Three external interrupts – Endianness: little endian Clocking – On-chip crystal oscillator and external clock input – Dynamic Phase-Locked Loop (PLL) ratio changes supported 1.2-V digital, 1.8-V analog, 3.3-V I/O design Interprocessor Communications (IPC) – 32 handshaking channels – Four channels generate IPC interrupts – Can be used to coordinate transfer of data through IPC Message RAMs Up to 74 individually programmable, multiplexed General-Purpose Input/Output (GPIO) pins – Glitch-free I/Os Control Subsystem — TMS320C28x 32-bit CPU – Up to 150 MHz – C28x core hardwar...