P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
‐20V
D
RDSON (MAX.)
...
P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
‐20V
D
RDSON (MAX.)
60mΩ
ID
‐4.5A
G
S
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source
Voltage
Continuous Drain Current Pulsed Drain Current1
TA = 25 °C TA = 70 °C
Power Dissipation
TA = 25 °C TA = 70 °C
Operating Junction & Storage Temperature Range
VGS ID IDM PD Tj, Tstg
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
TYPICAL
Junction‐to‐Ambient
RJA
1Pulse width limited by maximum junction temperature. 2Duty cycle 1%
2014/1/7
EMF60P02K
LIMITS ±12 ‐4.5 ‐3.2 ‐18 1.25 0.8
‐55 to 150
UNIT V
A
W °C
MAXIMUM 100
UNIT °C / W...