P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
‐60V
D
RDSON (MAX.)
...
P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
‐60V
D
RDSON (MAX.)
150mΩ
ID
‐2.4A
G
S
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source
Voltage
Continuous Drain Current Pulsed Drain Current1
TA = 25 °C TA = 70 °C
Power Dissipation
TA = 25 °C TA = 70 °C
Operating Junction & Storage Temperature Range
VGS ID IDM PD Tj, Tstg
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
TYPICAL
Junction‐to‐Case
RJC
Junction‐to‐Ambient3
RJA
1Pulse width limited by maximum junction temperature. 2Duty cycle 1% 385°C / W when mounted on a 1 in2 pad of 2 oz copper.
2016/11/24
EMBA5P06P
LIMITS ±20 ‐2.4 ‐1.5 ...