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EB201/D High Cell Density MOSFETs
Low On–Resistance Affords New Design Options
Prepared by: Kim Gau...
www.DataSheet4U.com
EB201/D High Cell Density
MOSFETs
Low On–Resistance Affords New Design Options
Prepared by: Kim Gauen and Wayne Chavez ON Semiconductor http://onsemi.com
ENGINEERING BULLETIN
Just a few years ago an affordable 60 V, 10 mΩ power transistor was a dream. After all, 10 mΩ is the resistance of about 20 cm of #22 gauge wire. Today a sub–10 mΩ power
MOSFET is not only available, it is housed in a standard TO–220. Such are the advances that have occurred lately in “high cell density” power
MOSFET technology. Furthermore, Motorola’s high cell density technology, HDTMOS®, brings other advantages such as greatly improved body diode performance. The technological advances are sufficiently great that they are fundamentally changing low
voltage power transistor technology.
Cutting the
MOSFET’s On–Resistance
A cross section of the power
MOSFET is shown in Figure 1. The major contributors to the standard
MOSFET’s
SOURCE GATE
on–resistance are its spreading, channel, JFET, accumulation region, and substrate resistances. To achieve ultra–low RDS(on), device designers must decrease the resistance of all these components. Most of the resistive elements can be reduced by shrinking cell size and adding more cells per square centimeter of silicon. However, there is a limit to maximum packing density. As cell density becomes very high, on–resistance actually increases due to a higher JFET resistance. With today’s processes and cell geometries, the optimum cell density is abo...