DSP1620

Advisory May 1999 Clarification to the Serial I/O Control Register Description for the DSP1620/27/28/29 Devices Active Clock Frequency The purpose of this advisory is to clarify the function of the serial I/O control registers in the DSP1620/27/28/29 devices. Specifically, it clarifies the function of the control register field that specifies the active clock frequency. The device data sheets state that the active clock frequency is a ratio of the input clock frequency on the CKI pin (DSP1627/28/29 devices) or the output clock frequency on the CKO pin (DSP1620 device). For all four devices, the actual active clock frequency is a ratio of the internal clock frequency, which can be programmed as either the input clock frequency on the CKI pin or the output of an internal clock synthesizer (PLL). Table 1 summarizes information for each of the four devices. It lists the document number for each device data sheet. For example, the data sheet for the DSP1620, entitled DSP1620 Digital Signal Processor, has the document number DS97-321WDSP . Table 1 also lists the name of each serial I/O unit on each device, the corresponding control register, the data sheet page number that describes the register, and the corresponding field within the register that specifies the active clock frequency. For example, the DSP1620 contains two serial I/O units named SIO and SSIO. The control register for SIO is sioc described on page 94 of the data sheet. Bits 8—7 within sioc (CLK1 field) specify the ...