DS92LV18

DS92LV18 www.ti.com SNLS156E – SEPTEMBER 2003 – REVISED APRIL 2013 DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz Check for Samples: DS92LV18 FEATURES 1 2 15–66 MHz 18:1/1:18 Serializer/Deserializer (2.376 Gbps Full Duplex Throughput) Independent Transmitter and Receiver Operation with Separate Clock, Enable, and Power Down Pins Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks to Random Data) Wide ±5% Reference Clock Frequency Tolerance for Easy System Design Using Locally-Generated Clocks Line and Local Loopback Modes Robust BLVDS Serial Transmission Across Backplanes and Cables for Low EMI No External Coding Required Internal PLL, No External PLL Components Required Single +3.3V Power Supply Low Power: 90mA (typ) Transmitter, 100mA (typ) at 66 MHz with PRBS-15 Pattern ±100 mV Receiver Input Threshold Loss of Lock Detection and Reporting Pin Industrial −40 to +85°C Temperature Range >2.0kV HBM ESD Compact, Standard 80-Pin LQFP Package DESCRIPTION The DS92LV18 Serializer/Deserializer (SERDES) pair transparently translates a 18–bit parallel bus into a BLVDS serial stream with embedded clock information. This single serial stream simplifies transferring a 18-bit, or less, bus over PCB traces and cables by eliminating the skew problems between parallel data and clock paths. It saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins. This SER...