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DS92LV010AEP

National Semiconductor

Bus LVDS 3.3/5.0V Single Transceiver

DS92LV010AEP Bus LVDS 3.3/5.0V Single Transceiver www.DataSheet4U.com OBSOLETE DS92LV010AEP June 15, 2009 Bus LVDS ...


National Semiconductor

DS92LV010AEP

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Description
DS92LV010AEP Bus LVDS 3.3/5.0V Single Transceiver www.DataSheet4U.com OBSOLETE DS92LV010AEP June 15, 2009 Bus LVDS 3.3/5.0V Single Transceiver General Description The DS92LV010AEP is one in a series of transceivers designed specifically for the high speed, low power proprietary bus backplane interfaces. The device operates from a single 3.3V or 5.0V power supply and includes one differential line driver and one receiver. To minimize bus loading the driver outputs and receiver inputs are internally connected. The logic interface provides maximum flexibility as 4 separate lines are provided (DIN, DE, RE, and ROUT). The device also features flow through which allows easy PCB routing for short stubs between the bus pins and the connector. The driver has 10 mA drive capability, allowing it to drive heavily loaded backplanes, with impedance as low as 27 Ohms. The driver translates between TTL levels (single-ended) to Low Voltage Differential Signaling levels. This allows for high speed operation, while consuming minimal power with reduced EMI. In addition the differential signaling provides common mode noise rejection of ±1V. The receiver threshold is ±100mV over a ±1V common mode range and translates the low voltage differential levels to standard (CMOS/TTL) levels. ENHANCED PLASTIC Extended Temperature Performance of -40°C to +85°C Baseline Control - Single Fab & Assembly Site Process Change Notification (PCN) Qualification & Reliability Data Solder (PbSn) Lead F...




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