DS90CR213/DS90CR214
DS90CR213/DS90CR214 21-Bit Channel Link—66 MHz
July 1997
DS90CR213/DS90CR214 21-Bit Channel Link—6...
DS90CR213/DS90CR214
DS90CR213/DS90CR214 21-Bit Channel Link—66 MHz
July 1997
DS90CR213/DS90CR214 21-Bit Channel Link—66 MHz
General Description
The DS90CR213 transmitter converts 21 bits of
CMOS/TTL data into three LVDS (Low
Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled and transmitted. The DS90CR214 receiver converts the LVDS data streams back into 21 bits of
CMOS/TTL data. At a transmit clock frequency of 66 MHz, 21 bits of TTL data are transmitted at a rate of 462 Mbps per LVDS data channel. Using a 66 MHz clock, the data throughput is 1.386 Gbit/s (173 Mbytes/s).
The multiplexing of the data lines provides a substantial cable reduction. Long distance parallel single-ended buses typically require a ground wire per active signal (and have very limited noise rejection capability). Thus, for a 21-bit wide data...