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DS8838 Datasheet

Part Number DS8838
Manufacturers National Semiconductor
Logo National Semiconductor
Description Quad Unified Bus Transceiver
Datasheet DS8838 DatasheetDS8838 Datasheet (PDF)

DS8838 Quad Unified Bus Receiver May 1999 DS8838 Quad Unified Bus Transceiver General Description The DS8838 is a quad high speed driver/receiver designed for use in bus organized data transmission systems interconnected by terminated 120Ω impedance lines. The external termination is intended to be 180Ω resistor from the bus to the +5V logic supply together with a 390Ω resistor from the bus to ground. The bus can be terminated at one or both ends. Low bus pin current allows up to 27 driver/rec.

  DS8838   DS8838






Part Number DS8839
Manufacturers National
Logo National
Description Quad Tri-State Bus Transceivers
Datasheet DS8838 DatasheetDS8839 Datasheet (PDF)

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  DS8838   DS8838







Part Number DS8837
Manufacturers National Semiconductor
Logo National Semiconductor
Description Hex Unified Bus Receiver
Datasheet DS8838 DatasheetDS8837 Datasheet (PDF)

DS7837 DS8837 Hex Unified Bus Receiver February 1996 DS7837 DS8837 Hex Unified Bus Receiver General Description The DS7837 DS8837 are high speed receivers designed for use in bus organized data transmission systems interconnected by terminated 120X impedance lines The external termination is intended to be 180X resistor from the bus to the a 5V logic supply together with a 390X resistor from the bus to ground The receiver design employs a built-in input hysteresis providing substantial noise i.

  DS8838   DS8838







Part Number DS8836
Manufacturers National
Logo National
Description Quad NOR Unified Bus Receiver
Datasheet DS8838 DatasheetDS8836 Datasheet (PDF)

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  DS8838   DS8838







Part Number DS8835
Manufacturers National Semiconductor
Logo National Semiconductor
Description Quad TRI-STATE Bus Transceivers
Datasheet DS8838 DatasheetDS8835 Datasheet (PDF)

DS7833 DS8833 DS7835 DS8835 Quad TRI-STATE Bus Transceivers February 1996 DS7833 DS8833 DS7835 DS8835 Quad TRI-STATE Bus Transceivers General Description This family of TRI-STATE bus transceivers offers extreme versatility in bus organized data transmission systems The data bus may be unterminated or terminated DC or AC at one or both ends Drivers in the third (high impedance) state load the data bus with a negligible leakage current The receiver input current is low allowing at least 100 driv.

  DS8838   DS8838







Quad Unified Bus Transceiver

DS8838 Quad Unified Bus Receiver May 1999 DS8838 Quad Unified Bus Transceiver General Description The DS8838 is a quad high speed driver/receiver designed for use in bus organized data transmission systems interconnected by terminated 120Ω impedance lines. The external termination is intended to be 180Ω resistor from the bus to the +5V logic supply together with a 390Ω resistor from the bus to ground. The bus can be terminated at one or both ends. Low bus pin current allows up to 27 driver/receiver pairs to utilize a common bus. The bus loading is unchanged when VCC = 0V. The receivers incorporate hysteresis to greatly enhance bus noise immunity. One two-input NOR gate is included to disable all drivers in a package simultaneously. Receiver performance is optimized for systems with bus rise and fall times ≤ 1.0 µs/V. Features n n n n n n n n n 4 totally separate driver/receiver pairs per package 1V typical receiver input hysteresis Receiver hysteresis independent of receiver output load Guaranteed minimum bus noise immunity of 1.3V, 2V typ. Temperature-insensitive receiver thresholds track bus logic levels 20 µA typical bus terminal current with normal VCC or with VCC = 0V Open collector driver output allows wire-OR connection High speed Series 74 TTL compatible driver and disable inputs and receiver outputs Typical Application DS005812-1 © 1999 National Semiconductor Corporation DS005812 www.national.com Connection Diagram Dual-In-Line Package DS005812-2 Top View .


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