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DS34T101 Datasheet

Part Number DS34T101
Manufacturers Maxim Integrated Products
Logo Maxim Integrated Products
Description (DS34T101 - DS34T108) Single/Dual/Quad/Octal TDM-Over-Packet Chip
Datasheet DS34T101 DatasheetDS34T101 Datasheet (PDF)

www.DataSheet4U.com Rev: 072707 DS34T101/DS34T102/DS34T104/DS34T108 Single/Dual/Quad/Octal TDM-Over-Packet Chip General Description The IETF PWE SAToP/CESoPSN/TDMoIP/HDLC draft-compliant DS34T108 allows up to eight T1/E1 links or frame-based serial HDLC links to be transported transparently through a switched IP or MPLS packet network. Jitter and wander of recovered clocks conform to G.823/G.824, G.8261, and TDM specifications. This eliminates the need for remote timing sources in cabinets and.

  DS34T101   DS34T101






Part Number DS34T108
Manufacturers Maxim Integrated Products
Logo Maxim Integrated Products
Description (DS34T101 - DS34T108) Single/Dual/Quad/Octal TDM-Over-Packet Chip
Datasheet DS34T101 DatasheetDS34T108 Datasheet (PDF)

www.DataSheet4U.com Rev: 072707 DS34T101/DS34T102/DS34T104/DS34T108 Single/Dual/Quad/Octal TDM-Over-Packet Chip General Description The IETF PWE SAToP/CESoPSN/TDMoIP/HDLC draft-compliant DS34T108 allows up to eight T1/E1 links or frame-based serial HDLC links to be transported transparently through a switched IP or MPLS packet network. Jitter and wander of recovered clocks conform to G.823/G.824, G.8261, and TDM specifications. This eliminates the need for remote timing sources in cabinets and.

  DS34T101   DS34T101







Part Number DS34T104
Manufacturers Maxim Integrated Products
Logo Maxim Integrated Products
Description (DS34T101 - DS34T108) Single/Dual/Quad/Octal TDM-Over-Packet Chip
Datasheet DS34T101 DatasheetDS34T104 Datasheet (PDF)

www.DataSheet4U.com Rev: 072707 DS34T101/DS34T102/DS34T104/DS34T108 Single/Dual/Quad/Octal TDM-Over-Packet Chip General Description The IETF PWE SAToP/CESoPSN/TDMoIP/HDLC draft-compliant DS34T108 allows up to eight T1/E1 links or frame-based serial HDLC links to be transported transparently through a switched IP or MPLS packet network. Jitter and wander of recovered clocks conform to G.823/G.824, G.8261, and TDM specifications. This eliminates the need for remote timing sources in cabinets and.

  DS34T101   DS34T101







Part Number DS34T102
Manufacturers Maxim Integrated Products
Logo Maxim Integrated Products
Description (DS34T101 - DS34T108) Single/Dual/Quad/Octal TDM-Over-Packet Chip
Datasheet DS34T101 DatasheetDS34T102 Datasheet (PDF)

www.DataSheet4U.com Rev: 072707 DS34T101/DS34T102/DS34T104/DS34T108 Single/Dual/Quad/Octal TDM-Over-Packet Chip General Description The IETF PWE SAToP/CESoPSN/TDMoIP/HDLC draft-compliant DS34T108 allows up to eight T1/E1 links or frame-based serial HDLC links to be transported transparently through a switched IP or MPLS packet network. Jitter and wander of recovered clocks conform to G.823/G.824, G.8261, and TDM specifications. This eliminates the need for remote timing sources in cabinets and.

  DS34T101   DS34T101







(DS34T101 - DS34T108) Single/Dual/Quad/Octal TDM-Over-Packet Chip

www.DataSheet4U.com Rev: 072707 DS34T101/DS34T102/DS34T104/DS34T108 Single/Dual/Quad/Octal TDM-Over-Packet Chip General Description The IETF PWE SAToP/CESoPSN/TDMoIP/HDLC draft-compliant DS34T108 allows up to eight T1/E1 links or frame-based serial HDLC links to be transported transparently through a switched IP or MPLS packet network. Jitter and wander of recovered clocks conform to G.823/G.824, G.8261, and TDM specifications. This eliminates the need for remote timing sources in cabinets and pedestals. The Ethernet side of the DS34T108 provides high QoS capabilities to its MII/RMII/SSMII port, while the WAN side supports full-featured T1/E1 framers and LIUs. This takes the solution all the way through analog, while preserving options to make use of TDM streams at key intermediate points. The high level of integration that the DS34T108 brings minimizes cost, board space, and time to market. 3 Features ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ Full-Featured T1/E1/J1 LIU/Framer/TDM-OverPacket Supports Adaptive Clock Recovery, Common Clock (Using RTP), External Clock, and Loopback Timing Modes Selectable 32-Bit or 16-Bit Processor Bus Clock Rate Adapter for T1/E1 Master Clock 10/100 Ethernet MAC That Supports MII/RMII/SSMII Fully Compatible with IEEE 802.3 Standard VLAN Support According to 802.1 p&Q Multiprotocol Encapsulation Supports IPv4, IPv6, UDP, RTP, L2TPv3, MPLS, and Metro Ethernet End-to-End TDM Synchronization Through the IP/MPLS Domain by Eight Independent On-Chip TDM Cloc.


2007-09-21 : XBTGT1100    XBT-GT1100    DS1372    DS2703    DS2704    DS2705    DS28DG02    DS3101    DS3105    DS3232   


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