DS26LS32MQML
www.ti.com
SNOSAM6B – OCTOBER 2005 – REVISED APRIL 2013
DS26LS32MQML Quad Differential Line Receivers
Ch...
DS26LS32MQML
www.ti.com
SNOSAM6B – OCTOBER 2005 – REVISED APRIL 2013
DS26LS32MQML Quad Differential Line Receivers
Check for Samples: DS26LS32MQML
FEATURES
1
2 High Differential or Common-Mode Input
Voltage Ranges of ±7V on the DS26LS32.
±0.2V Sensitivity Over the Input
Voltage Range on the DS26LS32.
DS26LS32 Meet All Requirements of RS-422 and RS-423
6k Minimum Input Impedance 100 mV Input Hysteresis on the DS26LS32 Operation From a single 5V Supply TRI-STATE Outputs, with Choice of
Complementary Output Enables for Receiving Directly onto a Data Bus
DESCRIPTION
The DS26LS32 and DS26LS32A are quad differential line receivers designed to meet the RS-422, RS-423 and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission.
The DS26LS32 and DS26LS32A have an input sensitivity of 200 mV over the input
voltage range of ±7V. The DS26LS33 has an input sensitivity of 500 mV over the input
voltage range of ±15V.
The DS26LS32A differs in function from the popular DS26LS32 and DS26LS33 in that input pull-up and pull-down resistors are included which prevent output oscillation on unused channels.
Each version provides an enable and disable function common to all four receivers and features TRI-STATE outputs with 8 mA sink capability. Constructed using low power Schottky processing, these devices are available over the full military and commercial operating temperature ranges.
Logic Diagram
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