DP8429

DP8428 NS32828 DP8429 NS32829 1 Megabit High Speed Dynamic RAM Controller Drivers September 1991 DP8428 NS32828 DP8429 NS32829 1 Megabit High Speed Dynamic RAM Controller Drivers General Description The DP8428 and DP8429 1M DRAM Controller Drivers are designed to provide ‘‘No-Waitstate’’ CPU interface to Dynamic RAM arrays of up to 8 Mbytes and larger The DP8428 and DP8429 are tailored for 32-bit and 16-bit system requirements respectively Both devices are fabricated using National’s new oxide isolated Advanced Low power Schottky (ALS) process and use design techniques which enable them to significantly out-perform all other LSI or discrete alternatives in speed level of integration and power consumption Each device integrates the following critical 1M DRAM controller functions on a single monolithic device ultra precise delay line 9 bit refresh counter fall-through row column and bank select input latches Row Column address muxing logic on-board high capacitive-load RAS CAS Write Enable and Address output drivers and precise control signal timing for all the above In order to specify each device for ‘‘true’’ worst case operating conditions all timing parameters are guaranteed while the chip is driving the capacitive load of 88 DRAMs including trace capacitance The chip’s delay timing logic makes use of a patented new delay line technique which keeps AC skew to g 3 ns over the full VCC range of g 10% and temperature range of b55 C to a 125 C The DP8428 and DP8429 guarantee ...