DM74S40

DM74S40 Dual 4-Input NAND Buffer August 1986 Revised April 2000 DM74S40 Dual 4-Input NAND Buffer General Description This device contains two independent gates each of which performs the logic NAND function. Ordering Code: Order Number DM74S40N Package Number N14A Package Description 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Connection Diagram Function Table Y = ABCD Inputs A X X X L H B X X L X H C X L X X H D L X X X H Output Y H H H H L H = HIGH Logic Level L = LOW Logic Level X = Either LOW or HIGH Logic Level © 2000 Fairchild Semiconductor Corporation DS006453 www.fairchildsemi.com DM74S40 Absolute Maximum Ratings(Note 1) Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 5.5V 0°C to +70°C −65°C to +150°C Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Free Air Operating Temperature 0 Parameter Min 4.75 2 0.8 −3 60 70 Nom 5 Max 5.25 Units V V V mA mA °C Electrical Characterist...