CYM1821

821 CYM1821 Features High-density 512-Kbit SRAM module 32-bit standard footprint supports densities from 16K x 32 through 1M x 32 High-speed CMOS SRAMs — Access time of 12 ns Low active power — 4W (max.) SMD technology TTL-compatible inputs and outputs Low profile — Max. height of .50 in. Small PCB footprint — 1.0 sq. in. JEDEC-compatible pinout Functional Description The CYM1821 is a high-performance 512-Kbit static RAM module organized as 16K words by 32 bits. This module is 16K x 32 Static RAM Module constructed from eight 16K x 4 SRAM SOJ packages mounted on an epoxy laminate board with pins. Four chip selects (CS1, CS2, CS3, and CS4) are used to independently enable the four bytes. Reading or writing can be executed on individual bytes or any combination of multiple bytes through proper use of selects. Writing to each byte is accomplished when the appropriate chip selects (CSN) and write enable (WE) inputs are both LOW. Data on the input/output pins (I/OX) is written into the memory location specified on the address pins (A0 through A13). Reading the device is accomplished by taking the chip selects (CSN) LOW, while write enable (WE) remains HIGH. Under these conditions the contents of the memory location specified on the address pins will appear on the data input/output pins (I/OX).The data input/output pins stay in the high-impedance state when write enable (WE) is LOW, or the appropriate chip selects are HIGH. Two pins (PD0 and PD1) are used to id...