CY74FCT162245T

1CY74FCT16445T/2 H245T Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY74FCT16245T CY74FCT162245T CY74FCT162H245T SCCS026B - July 1994 - Revised September 2001 Features Ioff supports partial-power-down mode operation Edge-rate control circuitry for significantly improved noise characteristics Typical output skew < 250 ps ESD > 2000V TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages Industrial temperature range of –40˚C to +85˚C VCC = 5V ± 10% CY74FCT16245T Features: 64 mA sink current, 32 mA source current Typical VOLP (ground bounce)<1.0V at VCC = 5V, TA = 25˚C CY74FCT162245T Features: Balanced output drivers: 24 mA Reduced system switching noise Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA= 25˚C CY74FCT162H245T Features: Bus hold on data inputs Eliminates the need for external pull-up or pull-down resistors 16-Bit Transceivers Functional Description These 16-bit transceivers are designed for use in bidirectional synchronous communication between two buses, where high speed and low power are required. With the exception of the CY74FCT16245T, these devices can be operated either as two independent octals or a single 16-bit transceiver. Direction of data flow is controlled by (DIR), the Output Enable (OE) transfers data when LOW and isolates the buses when HIGH. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the ...