One-PLL Clock Generator
CY26114
One-PLL Clock Generator
Features
■ Integrated phase-locked loop ■ Low skew, low jitter, high accuracy outputs ...
Description
CY26114
One-PLL Clock Generator
Features
■ Integrated phase-locked loop ■ Low skew, low jitter, high accuracy outputs ■ 3.3V operation with 2.5 V output option
Part Number Outputs
CY26114
4
Input Frequency 25 MHz Crystal Input
Benefits
■ Internal PLL with up to 333 MHz internal operation. ■ Meets critical timing requirements in complex system designs. ■ Enables application compatibility.
Output Frequency Range 2 copies of 100 MHz, 1 copy of 50 MHz, 1 copy 25, 33, 50, and 66 MHz (frequency selectable)
Logic Block Diagram
XIN XOUT
OSC.
FS0 FS1
QΦ
VCO
P
PLL
OUTPUT MULTIPLEXER
AND DIVIDERS
(frequency selectable)
100MHz 100MHz 50MHz
25/33/50/66MHz
VDDL
VDD AVDD AVSS VSS VSSL
CLK4 Frequency Select Options
FS1 FS0 00 01 10 11
CLK 4 25 33 50 66
Units MHz MHz MHz MHz
Cypress Semiconductor Corporation 198 Champion Court Document #: 38-07098 Rev. *B
San Jose, CA 95134-1709 408-943-2600
Revised May 15, 2008
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CY26114
Pin Configurations...
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